Today, the exponential growth in the number of interconnected devices (75 billion IoT devices expected by 2025) demands for more robust and reliable security layers to guarantee hardware integrity and information security. Security layers are a fundamental part of our hardware and digital infrastructure fulfilling several key functions e.g., assuring that a hardware sub-system is not counterfeit or that a client has authentication rights onto a server.
This thesis aims to explore novel implementations of photonic PUFs based on CMOS-compatible Silicon Photonics approaches for applications in hardware integrity (identification) and information security (secure authentication). This will involve (i) exploring various photonic architectures by means of system-level simulations considering the role of fabrication tolerances on the device modelling, (ii) assessing experimentally the performance of the prototypes (fabrication outsourced to CMOS foundries), (iii) carrying out an experimental analysis in terms of robustness and reliability by exploiting techniques well-known in the PUF and reliability communities, and (iv) proposing novel device/system designs and strategies to build more robust and reliable PUFs.
- Fabio Pavanello / INL – Lyon Institute of Nanotechnology – Ecole Centrale Lyon – email: firstname.lastname@example.org
- Ian O’Connor / INL – Lyon Institute of Nanotechnology – Ecole Centrale Lyon – email: email@example.com
- Xavier Letartre / INL – Lyon Institute of Nanotechnology – Ecole Centrale Lyon – email: firstname.lastname@example.org